Analog Circuits Laboratory
The companion third-semester laboratory course to Analog Circuits — hardware realization of wave shaping, amplifier, oscillator, power amplifier, and voltage regulator circuits, plus SPICE-based simulation experiments.
Instructor: Ameenudeen P E
Term: July - November
Location: Department of ECE, College of Engineering Trivandrum
Time: As per class timetable
Course Overview
This laboratory course accompanies the Analog Circuits theory course. It gives students hands-on experience building and testing analog circuits with discrete components, alongside SPICE-based simulation of the same circuits using open-source tools.
Course Outcomes
- CO1 — Design and demonstrate the functioning of basic analog circuits using discrete components.
- CO2 — Design and simulate the functioning of basic analog circuits using simulation tools.
- CO3 — Conduct troubleshooting of a given circuit and analyze it.
Part A — Hardware Experiments (any six mandatory)
- RC integrating and differentiating circuits
- Diode clipping and clamping circuits
- CE amplifier — design for a specific voltage gain
- CS MOSFET amplifier — design for a specific voltage gain
- Cascaded amplifier (CE–CE) — design for a specific voltage gain
- Cascode amplifier — design for a specific voltage gain
- Feedback amplifiers (current-series and voltage-series)
- RC oscillators — RC phase-shift or Wien bridge oscillator
- Power amplifiers (transformer-less) — class B and class AB
- Transistor series voltage regulator, with and without short-circuit protection
Part B — Simulation Experiments (any six mandatory)
Conducted using open-source tools such as QUCS, KiCad, LTspice, or other SPICE variants — the same ten experiments as Part A, simulated rather than built on hardware.
Textbooks
- David A. Bell, Electronic Devices and Circuits, Oxford University Press, 5th edition, 2008
- D. Meganathan, Electronic Circuits Analysis and Design 1, Yes Dee Publishing, 1st edition, 2023
Grading (CIE — 50 marks)
| Component | Marks |
|---|---|
| Attendance | 5 |
| Preparation / pre-lab work, viva, and timely completion of lab reports (continuous assessment) | 25 |
| Internal Examination | 20 |
Grading (ESE — 50 marks)
| Component | Marks |
|---|---|
| Procedure / preparatory work / design / algorithm | 10 |
| Conduct of experiment / execution / troubleshooting | 15 |
| Result with valid inference / quality of output | 10 |
| Viva voce | 10 |
| Record | 5 |
Students are admitted to the End Semester Examination only upon submitting a duly certified lab record, endorsed by the external examiner.
Schedule
| Week | Date | Topic | Materials |
|---|---|---|---|
| 1 | Jul 16 | RC Circuits and Diode Circuits Hardware: RC integrating and differentiating circuits. Simulation: transient analysis of RC integrating/differentiating circuits with different inputs and frequency response. | |
| 2 | Jul 23 | Diode Clipping and Clamping Hardware and simulation: diode clipping and clamping circuits — transient and transfer characteristics. | |
| 3 | Jul 30 | CE Amplifier Hardware: design and testing of a CE amplifier. Simulation: CE amplifier designed for a specific voltage gain, with frequency response characteristics. | |
| 4 | Aug 6 | CS MOSFET Amplifier Hardware and simulation: CS MOSFET amplifier designed for a specific voltage gain, with frequency response characteristics. | |
| 5 | Aug 13 | Cascaded and Cascode Amplifiers Hardware and simulation: cascaded (CE-CE) and cascode amplifiers, each designed for a specific voltage gain, with frequency response characteristics. | |
| 6 | Aug 20 | Feedback Amplifiers Hardware and simulation: current-series and voltage-series feedback amplifiers designed for a specific voltage gain, with frequency response characteristics. | |
| 7 | Aug 27 | RC Oscillators Hardware and simulation: RC phase-shift or Wien bridge oscillator. | |
| 8 | Sep 3 | Power Amplifiers Hardware and simulation: transformer-less power amplifiers — class B and class AB. | |
| 9 | Sep 10 | Voltage Regulator Hardware and simulation: transistor series voltage regulator, designed for a specific output voltage with and without short-circuit protection; load and line regulation characteristics plotted. | |
| 10 | Sep 17 | Consolidation and Record Completion Completion of pending experiments from Part A and Part B, and finalization of lab records. | |
| 11 | Sep 24 | Internal Examination (Tentative) Tentative date for the lab internal examination — preparation, conduct of experiments, viva, and timely completion of records are assessed. Unlike the theory courses, the lab does not follow the fixed series-exam schedule, so this date is subject to change. | |
| 12 | Oct 1 | Revision Revision and troubleshooting practice, and finalization of the lab record. |